DARPA programs aim for circuit chips that go up, not out

DARPA programs aim for circuit chips that go up, not out

The Defense Department is funding development programs to improve the efficiency of integrated circuit chips by stacking them in layers.

'You can only get a certain amount of circuitry in an area of silicon,' said Ken Williams of MCNC Research & Development Institute of Research Park Triangle, N.C.

Chip developers are shrinking the size of the circuits to get the most out of that space, but the next step in design efficiency is to go up, not out.

'You're building in the third dimension,' said Williams, vice president of the institute's Material and Electronic Technologies Division.

MCNC is working on a pair of programs with the Defense Advanced Research Projects Agency to develop prototype products using 3-D chips.

The institute is working with DRS Technologies Inc. of Parsippany, N.J., in the Vertically Interconnected Sensor Arrays program to produce more efficient and sensitive infrared sensing devices. It is working with Lucent Technologies Inc. of Murray Hill, N.J., on the Coherent Communications Imaging and Targeting program to develop technology to correct atmospheric distortion in optical systems.

The idea of stacking chips is not new. The new part is how the layers are interconnected. Traditional chips sometimes are stacked to save real estate, but the connections still are at the edge of the chips and are no shorter than on side-by-side configurations. So there is little if any improvement in performance, Williams said.

The MCNC technology drills connections straight through the silicon from one layer to the next, significantly shortening length and boosting signal processing.

Current applications use only three or four layers but require a high density of interconnects, Williams said.

In the VISA program, the first layer contains infrared detectors, the second layer is an analog processor and the third is for digital circuits. A fourth layer could be used to process color. In the CCIT, the first layer contains mirrors controlled by micro-electro-mechanical accuators. The second layer contains high voltage drivers for the accuators and the third layer does processing to correct distortion.

The VISA system could be used in night vision applications. The CCIT would work on optical data communications links, imaging or targeting. In each case, interconnects are required for processing each pixel produced by an infrared sensor or mirror.

Each program is in its second phase. In the first phase of the VISA program, MCNC demonstrated the operability of the densely packed interconnects. In phase two, circuitry will be connected with real sensors to produce a prototype.

A number of other research facilities are working on similar technologies. As size restrictions limit how closely circuits can be packed on a chip, companies also are believed to be working on the technology. But they are keeping quiet about their work, Williams said.

'We think companies like Intel and others are working down that path as a way to keep the process of Moore's law,' which predicts that computing power will double every 18 to 24 months.

About the Author

William Jackson is a Maryland-based freelance writer.

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